ADCX

REG0=GPR32_R():rw:d REG1=GPR32_B():r:d REG0=GPR32_R():rw:d MEM0:r:d REG0=GPR64_R():rw:q REG1=GPR64_B():r:q REG0=GPR64_R():rw:q MEM0:r:q

x86_64 X86_LEGACY APX ADOX_ADCX source: xed

XED_ADCX_X86_LEGACY_0F38_F6_717703

Encoding

encoding_kindX86_LEGACY
opcode_bytesF6 0F 38 F6 0F 38 F6 0F 38 F6
opcode_map0F38
mandatory_prefix-
has_modrmTrue
requires_modelong
cpl3
raw_encoding0x0F 0x38 0xF6 MOD[0b11] MOD=3 REG[rrr] RM[nnn] osz_refining_prefix W0 IMMUNE66() 0x0F 0x38 0xF6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() osz_refining_prefix W0 IMMUNE66() 0x0F 0x38 0xF6 MOD[0b11] MOD=3 REG[rrr] RM[nnn] osz_refining_prefix W1 IMMUNE66() mode64 0x0F 0x38 0xF6 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() osz_refining_prefix W1 IMMUNE66() mode64

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG d RW EXPLICIT MODRM_REG
1 REG1 REG d R EXPLICIT MODRM_REG
2 REG2 REG d RW EXPLICIT MODRM_REG
3 MEM0 MEM d R EXPLICIT MODRM_RM
4 REG3 REG q RW EXPLICIT MODRM_REG
5 REG4 REG q R EXPLICIT MODRM_REG
6 REG5 REG q RW EXPLICIT MODRM_REG
7 MEM1 MEM q R EXPLICIT MODRM_RM

Flag effects (1)

CF = READWRITE

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.