AND
REG0=GPRv_R():rw REG1=GPRv_B():r REG0=GPRv_R():rw MEM0:r:v
x86_64 X86_LEGACY LOGICAL I86 source: xed
XED_AND_GPRv_GPRv_23
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 23 23 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| cpl | 3 |
| raw_encoding | 0x23 MOD[0b11] MOD=3 REG[rrr] RM[nnn] 0x23 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | RW | EXPLICIT | MODRM_REG | ||
| 1 | REG1 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | REG2 | REG | RW | EXPLICIT | MODRM_REG | ||
| 3 | MEM0 | MEM | v | R | EXPLICIT | MODRM_RM |
Flag effects (6)
CF = SET_0
PF = WRITE
AF = UNDEFINED
ZF = WRITE
SF = WRITE
OF = SET_0
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.