FNSAVE
X87_ALU X87 x86_64
FNSAVE is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category X87_ALU. This page lists its 2 encoding forms, distinguished by opcode byte: DD.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_FNSAVE_X86_LEGACY_ONEBYTE_DD_304821
mem
XED_FNSAVE_X86_LEGACY_ONEBYTE_DD_758310
MEM0:w:mem94 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem94 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem94 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP