FNSAVE

MEM0:w:mem94 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem94 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem94 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP MEM0:w:mem108 \ REG0=XED_REG_X87CONTROL:rw:SUPP \ REG1=XED_REG_X87TAG:rw:SUPP \ REG3=XED_REG_X87STATUS:rw:SUPP

x86_64 X86_LEGACY X87_ALU X87 source: xed

XED_FNSAVE_X86_LEGACY_ONEBYTE_DD_758310

Encoding

encoding_kind	X86_LEGACY
opcode_bytes	DD DD DD DD DD DD DD
opcode_map	ONEBYTE
mandatory_prefix	-
has_modrm	True
modrm.reg = /6	/6
rex_w	1
requires_mode	long
attributes	x87_mmx_state_r x87_mmx_state_w X87_NOWAIT X87_CONTROL NOTSX
cpl	3
raw_encoding	0xDD MOD[mm] MOD!=3 REG[0b110] RM[nnn] mode16 no66_prefix MODRM() 0xDD MOD[mm] MOD!=3 REG[0b110] RM[nnn] mode32 66_prefix MODRM() 0xDD MOD[mm] MOD!=3 REG[0b110] RM[nnn] mode64 norexw_prefix 66_prefix MODRM() 0xDD MOD[mm] MOD!=3 REG[0b110] RM[nnn] mode16 66_prefix MODRM() 0xDD MOD[mm] MOD!=3 REG[0b110] RM[nnn] mode32 no66_prefix MODRM() 0xDD MOD[mm] MOD!=3 REG[0b110] RM[nnn] mode64 rexw_prefix MODRM() 0xDD MOD[mm] MOD!=3 REG[0b110] RM[nnn] mode64 norexw_prefix no66_prefix MODRM()

Operands (49)

#	Role	Kind	Width	Access	Visibility	Encoded in
0	MEM0	MEM	w	W	EXPLICIT	MODRM_RM
1	\	REG		R	EXPLICIT
2	REG0	REG		RW	SUPPRESSED	MODRM_REG
3	\	REG		R	EXPLICIT
4	REG1	REG		RW	SUPPRESSED	MODRM_REG
5	\	REG		R	EXPLICIT
6	REG2	REG		RW	SUPPRESSED	MODRM_REG
7	MEM1	MEM	w	W	EXPLICIT	MODRM_RM
8	\	REG		R	EXPLICIT
9	REG3	REG		RW	SUPPRESSED	MODRM_REG
10	\	REG		R	EXPLICIT
11	REG4	REG		RW	SUPPRESSED	MODRM_REG
12	\	REG		R	EXPLICIT
13	REG5	REG		RW	SUPPRESSED	MODRM_REG
14	MEM2	MEM	w	W	EXPLICIT	MODRM_RM
15	\	REG		R	EXPLICIT
16	REG6	REG		RW	SUPPRESSED	MODRM_REG
17	\	REG		R	EXPLICIT
18	REG7	REG		RW	SUPPRESSED	MODRM_REG
19	\	REG		R	EXPLICIT
20	REG8	REG		RW	SUPPRESSED	MODRM_REG
21	MEM3	MEM	w	W	EXPLICIT	MODRM_RM
22	\	REG		R	EXPLICIT
23	REG9	REG		RW	SUPPRESSED	MODRM_REG
24	\	REG		R	EXPLICIT
25	REG10	REG		RW	SUPPRESSED	MODRM_REG
26	\	REG		R	EXPLICIT
27	REG11	REG		RW	SUPPRESSED	MODRM_REG
28	MEM4	MEM	w	W	EXPLICIT	MODRM_RM
29	\	REG		R	EXPLICIT
30	REG12	REG		RW	SUPPRESSED	MODRM_REG
31	\	REG		R	EXPLICIT
32	REG13	REG		RW	SUPPRESSED	MODRM_REG
33	\	REG		R	EXPLICIT
34	REG14	REG		RW	SUPPRESSED	MODRM_REG
35	MEM5	MEM	w	W	EXPLICIT	MODRM_RM
36	\	REG		R	EXPLICIT
37	REG15	REG		RW	SUPPRESSED	MODRM_REG
38	\	REG		R	EXPLICIT
39	REG16	REG		RW	SUPPRESSED	MODRM_REG
40	\	REG		R	EXPLICIT
41	REG17	REG		RW	SUPPRESSED	MODRM_REG
42	MEM6	MEM	w	W	EXPLICIT	MODRM_RM
43	\	REG		R	EXPLICIT
44	REG18	REG		RW	SUPPRESSED	MODRM_REG
45	\	REG		R	EXPLICIT
46	REG19	REG		RW	SUPPRESSED	MODRM_REG
47	\	REG		R	EXPLICIT
48	REG20	REG		RW	SUPPRESSED	MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.