NOP

REG0=GPRv_B():r REG0=GPRv_B():r REG0=GPRv_B():r REG0=GPRv_B():r REG0=GPRv_B():r MEM0:r:v REG0=GPRv_B():r REG0=GPRv_B():r REG0=GPRv_B():r

x86_64 X86_LEGACY WIDENOP FAT_NOP source: xed

XED_NOP_GPRv_0F18r0 NOP_GPRv_0F18r1 NOP_GPRv_0F18r2 NOP_GPRv_0F18r3 NOP_GPRv_0F18r4 NOP_MEMv_0F18r5 NOP_GPRv_0F18r5 NOP_GPRv_0F18r6 NOP_GPRv_0F18r7

Encoding

encoding_kindX86_LEGACY
opcode_bytes18 0F 18 0F 18 0F 18 0F 18 0F 18 0F 18 0F 18 0F 18
opcode_map0F
mandatory_prefix-
has_modrmTrue
modrm.reg = /7/7
attributesNOP
cpl3
raw_encoding0x0F 0x18 MOD[0b11] MOD=3 REG[0b000] RM[nnn] 0x0F 0x18 MOD[0b11] MOD=3 REG[0b001] RM[nnn] 0x0F 0x18 MOD[0b11] MOD=3 REG[0b010] RM[nnn] 0x0F 0x18 MOD[0b11] MOD=3 REG[0b011] RM[nnn] 0x0F 0x18 MOD[0b11] MOD=3 REG[0b100] RM[nnn] 0x0F 0x18 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() 0x0F 0x18 MOD[0b11] MOD=3 REG[0b101] RM[nnn] 0x0F 0x18 MOD[0b11] MOD=3 REG[0b110] RM[nnn] 0x0F 0x18 MOD[0b11] MOD=3 REG[0b111] RM[nnn]

Operands (9)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG R EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 REG3 REG R EXPLICIT MODRM_REG
4 REG4 REG R EXPLICIT MODRM_REG
5 MEM0 MEM v R EXPLICIT MODRM_RM
6 REG5 REG R EXPLICIT MODRM_REG
7 REG6 REG R EXPLICIT MODRM_REG
8 REG7 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.