PINSRW

REG0=MMX_R():rw:q:u16 MEM0:r:w:u16 IMM0:r:b REG0=MMX_R():rw:q:u16 REG1=GPR32_B():r IMM0:r:b

x86_64 X86_LEGACY MMX PENTIUMMMX source: xed

XED_PINSRW_X86_LEGACY_0F_C4_861373

Encoding

encoding_kindX86_LEGACY
opcode_bytesC4 0F C4
opcode_map0F
mandatory_prefix-
has_modrmTrue
imm_size_bytes1
attributesNOTSX
exception_classmmx-mem
cpl3
raw_encoding0x0F 0xC4 no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() 0x0F 0xC4 no_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8()

Operands (6)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG q RW EXPLICIT MODRM_REG
1 MEM0 MEM w R EXPLICIT MODRM_RM
2 IMM0 IMM b R EXPLICIT IMM
3 REG1 REG q RW EXPLICIT MODRM_REG
4 REG2 REG R EXPLICIT MODRM_REG
5 IMM1 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.