RDMSR
SYSTEM APX_F_MSR_IMM x86_64
RDMSR is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category SYSTEM. This page lists its 4 encoding forms, distinguished by opcode bytes: 32, F6.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_RDMSR_X86_LEGACY_ONEBYTE_F6_856550
r64, imm32
XED_RDMSR_GPR64u64_IMM32
REG0=VGPR64_B():w:q:u64 IMM0:r:d REG1=XED_REG_MSRS:r:SUPP
XED_RDMSR_GPR64u64_IMM32_APX
REG0=GPR64_B():w:q:u64 IMM0:r:d REG1=XED_REG_MSRS:r:SUPP
XED_RDMSR_X86_LEGACY_0F_32_873508
REG0=XED_REG_EAX:w:SUPP REG1=XED_REG_EDX:w:SUPP REG2=XED_REG_ECX:r:SUPP REG3=XED_REG_MSRS:r:SUPP