RDMSR
REG0=VGPR64_B():w:q:u64 IMM0:r:d REG1=XED_REG_MSRS:r:SUPP
x86_64 X86_LEGACY SYSTEM MSR_IMM source: xed
XED_RDMSR_GPR64u64_IMM32
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | F6 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /0 | /0 |
| vex_l | 0 |
| requires_mode | long |
| attributes | NOTSX RING0 |
| exception_class | MSR-IMM-VEX |
| cpl | 0 |
| raw_encoding | VV1 0xF6 VF2 MAP7 MOD[0b11] MOD=3 REG[0b000] RM[nnn] VL128 mode64 NOVSR UIMM32() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | IMM0 | IMM | d | R | EXPLICIT | IMM | |
| 2 | REG1 | REG | R | SUPPRESSED | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.