VCVTPH2PS

REG0=XMM_R():w:dq:f32 MEM0:r:q:f16 REG0=XMM_R():w:dq:f32 REG1=XMM_B():r:q:f16 REG0=YMM_R():w:qq:f32 MEM0:r:dq:f16 REG0=YMM_R():w:qq:f32 REG1=XMM_B():r:dq:f16

x86_64 X86_LEGACY CONVERT F16C source: xed

XED_VCVTPH2PS_X86_LEGACY_ONEBYTE_13_172989

Encoding

encoding_kindX86_LEGACY
opcode_bytes13 13 13 13
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesMXCSR
exception_classavx-type-11
cpl3
raw_encodingVV1 0x13 VL128 V66 V0F38 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VV1 0x13 VL128 V66 V0F38 NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VV1 0x13 VL256 V66 V0F38 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VV1 0x13 VL256 V66 V0F38 NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 MEM0 MEM q R EXPLICIT MODRM_RM
2 REG1 REG w W EXPLICIT MODRM_REG
3 REG2 REG q R EXPLICIT MODRM_REG
4 REG3 REG w W EXPLICIT MODRM_REG
5 MEM1 MEM R EXPLICIT MODRM_RM
6 REG4 REG w W EXPLICIT MODRM_REG
7 REG5 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.