VCVTSD2SI
REG0=GPR32_R():w:d:i32 MEM0:r:q:f64 REG0=GPR32_R():w:d:i32 MEM0:r:q:f64
x86_64 X86_LEGACY CONVERT AVX512F_SCALAR source: xed
XED_VCVTSD2SI_GPR32i32_MEMf64_AVX512 VCVTSD2SI_GPR32i32_MEMf64_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 2D 2D |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| requires_mode | long |
| attributes | MXCSR SIMD_SCALAR DISP8_GPR_WRITER_LDOP_Q |
| exception_class | AVX512-E3NF |
| cpl | 3 |
| raw_encoding | EVV 0x2D VF2 V0F MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_ONE() FIX_ROUND_LEN128() EVV 0x2D VF2 V0F MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_ONE() EVEXR4_ONE() FIX_ROUND_LEN128() |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | MEM0 | MEM | q | R | EXPLICIT | MODRM_RM | |
| 2 | REG1 | REG | w | W | EXPLICIT | MODRM_REG | |
| 3 | MEM1 | MEM | q | R | EXPLICIT | MODRM_RM |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.