VCVTTPD2UDQS

REG0=XMM_R3():w:dq:u32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f64:TXT=BCASTSTR

x86_64 X86_LEGACY CONVERT AVX512_SAT_CVT_DS_256 source: xed

XED_VCVTTPD2UDQS_XMMu32_MASKmskw_MEMf64_AVX512_VL256

Encoding

encoding_kindX86_LEGACY
opcode_bytes6C
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesBROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR USES_DAZ
exception_classAVX512-E2
cpl3
raw_encodingEVV 0x6C VNP MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UBIT=1 W1 VL256 NOEVSR ESIZE_64_BITS() NELEM_FULL()

Operands (3)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 MEM0 MEM f64 R EXPLICIT MODRM_RM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.