VCVTUSI2SS
REG0=XMM_R3():w:dq:f32 REG1=XMM_N3():r:dq:f32 MEM0:r:d:u32 REG0=XMM_R3():w:dq:f32 REG1=XMM_N3():r:dq:f32 MEM0:r:d:u32
x86_64 X86_LEGACY CONVERT AVX512F_SCALAR source: xed
XED_VCVTUSI2SS_XMMf32_XMMf32_MEMu32_AVX512 VCVTUSI2SS_XMMf32_XMMf32_MEMu32_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 7B 7B |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| requires_mode | long |
| attributes | MXCSR SIMD_SCALAR DISP8_GPR_READER |
| exception_class | AVX512-E3NF |
| cpl | 3 |
| raw_encoding | EVV 0x7B VF3 V0F MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() not64 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_ONE() FIX_ROUND_LEN128() EVV 0x7B VF3 V0F MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() mode64 W0 ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_ONE() FIX_ROUND_LEN128() |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | f32 | R | EXPLICIT | MODRM_REG | |
| 2 | MEM0 | MEM | d | R | EXPLICIT | MODRM_RM | |
| 3 | REG2 | REG | w | W | EXPLICIT | MODRM_REG | |
| 4 | REG3 | REG | f32 | R | EXPLICIT | MODRM_REG | |
| 5 | MEM1 | MEM | d | R | EXPLICIT | MODRM_RM |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.