VEXTRACTPS

AVX512 AVX512F_128N x86_64

VEXTRACTPS is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category AVX512. This page lists its 3 encoding forms, distinguished by opcode byte: 17.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

XED_VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512
REG0=GPR32_B():w:d:f32 REG1=XMM_R3():r:dq:f32 IMM0:r:b
X86_LEGACY 17 /r AVX512F_128N
XED_VEXTRACTPS_MEMf32_XMMf32_IMM8_AVX512
MEM0:w:d:f32 REG0=XMM_R3():r:dq:f32 IMM0:r:b
X86_LEGACY 17 /r AVX512F_128N
XED_VEXTRACTPS_X86_LEGACY_ONEBYTE_17_267186
MEM0:w:d:f32 REG0=XMM_R():r:dq:f32 IMM0:r:b REG0=VGPR32_B():w REG1=XMM_R():r:dq:f32 IMM0:r:b
X86_LEGACY 17 17 /r AVX