VMOVAPD
MEM0:w:zd:f64 REG0=MASK1():r:mskw REG1=ZMM_R3():r:zf64
x86_64 X86_LEGACY DATAXFER AVX512F_512 source: xed
XED_VMOVAPD_MEMf64_MASKmskw_ZMMf64_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 29 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 2 |
| attributes | MEMORY_FAULT_SUPPRESSION MASKOP_EVEX REQUIRES_ALIGNMENT DISP8_FULLMEM |
| exception_class | AVX512-E1 |
| cpl | 3 |
| raw_encoding | EVV 0x29 V66 V0F MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | MEM0 | MEM | w | W | EXPLICIT | MODRM_RM | |
| 1 | REG0 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | REG1 | REG | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.