VMOVSH

DATAXFER AVX512_FP16_SCALAR x86_64

VMOVSH is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category DATAXFER. This page lists its 3 encoding forms, distinguished by opcode bytes: 10, 11.

Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.

XED_VMOVSH_MEMf16_MASKmskw_XMMf16_AVX512
MEM0:w:wrd:f16 REG0=MASK1():r:mskw REG1=XMM_R3():r:dq:f16
X86_LEGACY 11 /r AVX512_FP16_SCALAR
XED_VMOVSH_XMMf16_MASKmskw_MEMf16_AVX512
REG0=XMM_R3():w:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:wrd:f16
X86_LEGACY 10 /r AVX512_FP16_SCALAR
XED_VMOVSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512
REG0=XMM_R3():w:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f16 REG3=XMM_B3():r:dq:f16
X86_LEGACY 10 /r AVX512_FP16_SCALAR