VMOVSH
MEM0:w:wrd:f16 REG0=MASK1():r:mskw REG1=XMM_R3():r:dq:f16
x86_64 X86_LEGACY DATAXFER AVX512_FP16_SCALAR source: xed
XED_VMOVSH_MEMf16_MASKmskw_XMMf16_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 11 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| attributes | DISP8_SCALAR MASKOP_EVEX MEMORY_FAULT_SUPPRESSION SIMD_SCALAR |
| exception_class | AVX512-E5 |
| cpl | 3 |
| raw_encoding | EVV 0x11 VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 ESIZE_16_BITS() NELEM_ONE() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | MEM0 | MEM | w | W | EXPLICIT | MODRM_RM | |
| 1 | REG0 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | REG1 | REG | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.