VMOVSS

DATAXFER AVX512F_SCALAR x86_64

6 encoding forms.

XED_VMOVSS_MEMf32_MASKmskw_XMMf32_AVX512
MEM0:w:d:f32 REG0=MASK1():r:mskw REG1=XMM_R3():r:dq:f32
X86_LEGACY 11 /r AVX512F_SCALAR
XED_VMOVSS_X86_LEGACY_ONEBYTE_10_542721
REG0=XMM_R():w:dq:f32 MEM0:r:d:f32
X86_LEGACY 10 /r AVX
XED_VMOVSS_X86_LEGACY_ONEBYTE_11_410376
MEM0:w:d:f32 REG0=XMM_R():r:d:f32
X86_LEGACY 11 /r AVX
XED_VMOVSS_XMMdq_XMMdq_XMMd_10 VMOVSS_XMMdq_XMMdq_XMMd_11
REG0=XMM_R():w:dq:f32 REG1=XMM_N():r:dq:f32 REG2=XMM_B():r:d:f32 REG0=XMM_B():w:dq:f32 REG1=XMM_N():r:dq:f32 REG2=XMM_R():r:d:f32
X86_LEGACY 10 11 /r AVX
XED_VMOVSS_XMMf32_MASKmskw_MEMf32_AVX512
REG0=XMM_R3():w:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:d:f32
X86_LEGACY 10 /r AVX512F_SCALAR
XED_VMOVSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512
REG0=XMM_R3():w:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32 REG3=XMM_B3():r:dq:f32
X86_LEGACY 10 /r AVX512F_SCALAR