VPCMPEQW

REG0=MASK_R():w:mskw REG1=MASK1():r:mskw REG2=YMM_N3():r:qq:u16 MEM0:r:qq:u16

x86_64 X86_LEGACY AVX512 AVX512BW_256 source: xed

XED_VPCMPEQW_MASKmskw_MASKmskw_YMMu16_MEMu16_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes75
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesDISP8_FULLMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
exception_classAVX512-E4
cpl3
raw_encodingEVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 VL256 ZEROING=0 ESIZE_16_BITS() NELEM_FULLMEM()

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 MEM0 MEM R EXPLICIT MODRM_RM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.