VPMOVZXWD
REG0=YMM_R():w:qq:u32 REG1=XMM_B():r:dq:u16 REG0=YMM_R():w:qq:u32 MEM0:r:dq:u16
x86_64 X86_LEGACY DATAXFER AVX2 source: xed
XED_VPMOVZXWD_X86_LEGACY_ONEBYTE_33_806662
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 33 33 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 1 |
| exception_class | avx-type-5 |
| cpl | 3 |
| raw_encoding | VV1 0x33 V66 V0F38 VL256 NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] VV1 0x33 V66 V0F38 VL256 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | REG2 | REG | w | W | EXPLICIT | MODRM_REG | |
| 3 | MEM0 | MEM | R | EXPLICIT | MODRM_RM |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.