VPSLLW

XED_VPSLLW_X86_LEGACY_ONEBYTE_71_558530

REG0=XMM_N():w:dq:u16 REG1=XMM_B():r:dq:u16 IMM0:r:b

X86_LEGACY 71 /6 AVX

XED_VPSLLW_X86_LEGACY_ONEBYTE_71_938249

REG0=YMM_N():w:qq:u16 REG1=YMM_B():r:qq:u16 IMM0:r:b

X86_LEGACY 71 /6 AVX2

XED_VPSLLW_X86_LEGACY_ONEBYTE_F1_164407

REG0=XMM_R():w:dq:u16 REG1=XMM_N():r:dq:u16 MEM0:r:dq:u64 REG0=XMM_R():w:dq:u16 REG1=XMM_N():r:dq:u16 REG2=XMM_B():r:dq:u64

X86_LEGACY F1 F1 /r AVX

XED_VPSLLW_X86_LEGACY_ONEBYTE_F1_189289

REG0=YMM_R():w:qq:u16 REG1=YMM_N():r:qq:u16 MEM0:r:dq:u64 REG0=YMM_R():w:qq:u16 REG1=YMM_N():r:qq:u16 REG2=XMM_B():r:q:u64

X86_LEGACY F1 F1 /r AVX2

XED_VPSLLW_XMMu16_MASKmskw_MEMu16_IMM8_AVX512

REG0=XMM_N3():w:dq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:dq:u16 IMM0:r:b

X86_LEGACY 71 /6 AVX512BW_128

XED_VPSLLW_XMMu16_MASKmskw_XMMu16_IMM8_AVX512

REG0=XMM_N3():w:dq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:u16 IMM0:r:b

X86_LEGACY 71 /6 AVX512BW_128

XED_VPSLLW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512

REG0=XMM_R3():w:dq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:u16 MEM0:r:dq:u16

X86_LEGACY F1 /r AVX512BW_128

XED_VPSLLW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512

REG0=XMM_R3():w:dq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:u16 REG3=XMM_B3():r:dq:u16

X86_LEGACY F1 /r AVX512BW_128

XED_VPSLLW_YMMu16_MASKmskw_MEMu16_IMM8_AVX512

REG0=YMM_N3():w:qq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:qq:u16 IMM0:r:b

X86_LEGACY 71 /6 AVX512BW_256

XED_VPSLLW_YMMu16_MASKmskw_YMMu16_IMM8_AVX512

REG0=YMM_N3():w:qq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:u16 IMM0:r:b

X86_LEGACY 71 /6 AVX512BW_256

XED_VPSLLW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512

REG0=YMM_R3():w:qq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:u16 MEM0:r:dq:u16

X86_LEGACY F1 /r AVX512BW_256

XED_VPSLLW_YMMu16_MASKmskw_YMMu16_XMMu16_AVX512

REG0=YMM_R3():w:qq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:u16 REG3=XMM_B3():r:dq:u16

X86_LEGACY F1 /r AVX512BW_256

XED_VPSLLW_ZMMu16_MASKmskw_MEMu16_IMM8_AVX512

REG0=ZMM_N3():w:zu16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:zd:u16 IMM0:r:b

X86_LEGACY 71 /6 AVX512BW_512

XED_VPSLLW_ZMMu16_MASKmskw_ZMMu16_IMM8_AVX512

REG0=ZMM_N3():w:zu16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zu16 IMM0:r:b

X86_LEGACY 71 /6 AVX512BW_512

XED_VPSLLW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512

REG0=ZMM_R3():w:zu16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zu16 MEM0:r:dq:u16

X86_LEGACY F1 /r AVX512BW_512

XED_VPSLLW_ZMMu16_MASKmskw_ZMMu16_XMMu16_AVX512

REG0=ZMM_R3():w:zu16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zu16 REG3=XMM_B3():r:dq:u16

X86_LEGACY F1 /r AVX512BW_512