VPSRLQ

REG0=XMM_R():w:dq:u64 REG1=XMM_N():r:dq:u64 MEM0:r:dq:u64 REG0=XMM_R():w:dq:u64 REG1=XMM_N():r:dq:u64 REG2=XMM_B():r:dq:u64

x86_64 X86_LEGACY AVX512 AVX source: xed

XED_VPSRLQ_X86_LEGACY_ONEBYTE_D3_530234

Encoding

encoding_kindX86_LEGACY
opcode_bytesD3 D3
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
exception_classavx-type-7
cpl3
raw_encodingVV1 0xD3 VL128 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VV1 0xD3 VL128 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn]

Operands (6)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 MEM0 MEM R EXPLICIT MODRM_RM
3 REG2 REG w W EXPLICIT MODRM_REG
4 REG3 REG R EXPLICIT MODRM_REG
5 REG4 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.