VPTESTNMW

REG0=MASK_R():w:mskw REG1=MASK1():r:mskw REG2=XMM_N3():r:dq:u16 REG3=XMM_B3():r:dq:u16

x86_64 X86_LEGACY LOGICAL AVX512BW_128 source: xed

XED_VPTESTNMW_MASKmskw_MASKmskw_XMMu16_XMMu16_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes26
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
attributesMASKOP_EVEX
exception_classAVX512-E4
cpl3
raw_encodingEVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W1 VL128 ZEROING=0

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 REG3 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.